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Data Sheet
A m p l i fy t h e H u m a n E x p e r i e n c e
(R)
Comlinear CLC1603, CLC3603, CLC3613
features n 0.1dB gain flatness to 30MHz n 0.01%/0.03 differential gain/phase n 200MHz -3dB bandwidth at G = 2 n 140MHz large signal bandwidth n 450V/s slew rate n 1.1mA supply current (enabled) n 0.35mA supply current (disabled) n 100mA output current n Fully specified at 5V and 5V supplies n CLC1603: Pb-free SOT23-6 n CLC3603: Pb-free SOIC-16 n CLC3613: Pb-free SOIC-14 applications n RGB video line drivers n Portable Video n Line drivers n Set top box n Active filters n Cable drivers n Imaging applications n Radar/communication receivers
Single and Triple, 1.1mA, 200MHz Amplifiers
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
General Description
The COMLINEAR CLC1603 (single with disable), CLC3603 (triple with disable), and CLC3613 (triple) are high-performance, current feedback amplifiers that provide 240MHz unity gain bandwidth, 0.1dB gain flatness to 30MHz, and 450V/s slew rate while consuming only 1.1mA of supply current. This high performance exceeds the requirements of NTSC/PAL/HDTV video applications. These COMLINEAR high-performance amplifiers also provide ample output current to drive multiple video loads. The COMLINEAR CLC1603, CLC3603, and CLC3613 are designed to operate from 5V or +5V supplies. The CLC1603 and CLC3603 offer a enable/disable feature to save power. While disabled, the outputs are in a high-impedance state to allow for multiplexing applications. The combination of high-speed, low-power, and excellent video performance make these amplifiers well suited for use in many general purpose, high-speed applications including set top boxes, high-definition video, active filters, and cable driving applications.
Typical Application - Driving Dual Video Loads
Ordering Information
Part Number CLC1603IST6X CLC3613ISO14X CLC3613ISO14 CLC3603ISO16X CLC3603ISO16 Package SOT23-6 SOIC-14 SOIC-14 SOIC-16 SOIC-16 Disable Option Yes No No Yes Yes Pb-Free Yes Yes Yes Yes Yes RoHS Compliant Yes Yes Yes Yes Yes Operating Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C Packaging Method Reel Reel Rail Reel Rail
Rev 1A
Moisture sensitivity level for all parts is MSL-1.
(c)2007-2008 CADEKA Microcircuits LLC
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Data Sheet
CLC1603 Pin Configuration
CLC1603 Pin Assignments
Pin No. Pin Name OUT -VS +IN -IN DIS +VS Description Output Negative supply Positive input Negative input Disable. Enabled if pin is left floating or pulled above VON, disabled if pin is grounded or pulled below VOFF. Positive supply 1 2 3 4 5 6
OUT -V S +IN
1 2 3 +
6
+VS DIS -IN
-
5 4
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
CLC3603 Pin Configuration
-IN1 +IN1 -VS -IN2 +IN2 -VS +IN3 -IN3
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
CLC3603 Pin Assignments
Pin No. Pin Name -IN1 +IN1 -VS -IN2 +IN2 -VS +IN3 -IN3 DIS3 OUT3 +VS OUT2 DIS2 +VS OUT1 DIS1 Description Negative input, channel 1 Positive input, channel 1 Negative supply Negative input, channel 2 Positive input, channel 2 Negative supply Positive input, channel 3 Negative input, channel 3 Disable pin for channel 3. Enabled if pin is left floating or pulled above VON, disabled if pin is grounded or pulled below VOFF. Output, channel 3 Positive supply Output, channel 2 Disable pin for channel 2. Enabled if pin is left floating or pulled above VON, disabled if pin is grounded or pulled below VOFF. Positive supply Output, channel 1 Disable pin for channel 2. Enabled if pin is left floating or pulled above VON, disabled if pin is grounded or pulled below VOFF. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
DIS1 OUT1 +VS DIS2 OUT2 +VS OUT3 DIS3
Disable Pin Truth Table
Pin DIS
*Default Open State
High* ( > (+Vs - 1.5V)) Enabled
Low ( < (+Vs - 3.5V)) Disabled
Rev 1A
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2
Data Sheet
CLC3613 Pin Configuration
CLC3613 Pin Assignments
Pin No. Pin Name NC NC NC +VS +IN1 -IN1 OUT1 OUT3 -IN3 +IN3 -VS +IN2 -IN2 OUT2 Description No Connect No Connect No Connect Positive supply Positive input, channel 1 Negative input, channel 1 Output, channel 1 Output, channel 3 Negative input, channel 3 Positive input, channel 3 Negative supply Positive input, channel 2 Negative input, channel 2 Output, channel 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14
NC NC NC +VS +IN1 -IN1 OUT1
1 2 3 4 5 6 7
14 13 12 11 10 9 8
OUT2 -IN2 +IN2 -VS +IN3 -IN3 OUT3
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Rev 1A
(c)2007-2008 CADEKA Microcircuits LLC
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3
Data Sheet
Absolute Maximum Ratings
The safety of the device is not guaranteed when it is operated above the "Absolute Maximum Ratings". The device should not be operated at these "absolute" limits. Adhere to the "Recommended Operating Conditions" for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the operating conditions noted on the tables and plots.
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Parameter Supply Voltage Input Voltage Range Continuous Output Current
Min 0 -Vs -0.5V
Max 14 +Vs +0.5V 100
Unit V V mA
Reliability Information
Parameter Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10s) Package Thermal Resistance 6-Lead SOT23 14-Lead SOIC 16-Lead SOIC
Notes: Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air.
Min -65
Typ
Max 150 150 300
Unit C C C C/W C/W C/W
177 88 68
ESD Protection
Product Human Body Model (HBM) Charged Device Model (CDM) SOT23-6 2kV 1kV SOIC-14 2kV 1kV SOIC-16 2kV 1kV
Recommended Operating Conditions
Parameter Operating Temperature Range Supply Voltage Range Min -40 4.5 Typ Max +85 12 Unit C V
Rev 1A
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Data Sheet
Electrical Characteristics at +5V
TA = 25C, +Vs = 5V, -VS = GND, Rf = Rg =1.2k, RL = 100 to +VS/2, G = 2; unless otherwise noted.
symbol
UGBW BWSS BWLS BW0.1dBSS tR, tF tS OS SR HD2 HD3 THD DG DP IP3 SFDR en in XTALK VIO dVIO Ibn dIbn Ibi dIbi PSRR IS TON TOFF VOFF VON ISD
parameter
Unity Gain Bandwidth -3dB Bandwidth Large Signal Bandwidth 0.1dB Gain Flatness Rise and Fall Time Settling Time to 0.1% Settling Time to 0.01% Overshoot Slew Rate 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Differential Gain Differential Phase Third Order Intercept Spurious Free Dynamic Range Input Voltage Noise Input Current Noise Crosstalk Input Offset Voltage Average Drift Input Bias Current - Non-Inverting Average Drift Input Bias Current - Inverting Average Drift Power Supply Rejection Ratio Supply Current Turn On Time Turn Off Time Power Down Input Voltage Enable Input Voltage Disable Supply Current
conditions
G = +1, VOUT = 0.5Vpp, Rf = 2.5k G = +2, VOUT = 0.5Vpp G = +2, VOUT = 1Vpp G = +2, VOUT = 0.5Vpp VOUT = 1V step; (10% to 90%) VOUT = 1V step VOUT = 1V step VOUT = 0.2V step 1V step VOUT = 1Vpp, 5MHz VOUT = 1Vpp, 5MHz VOUT = 1Vpp, 5MHz NTSC (3.58MHz), AC-coupled, RL = 150 NTSC (3.58MHz), AC-coupled, RL = 150 VOUT = 1Vpp, 10MHz VOUT = 1Vpp, 5MHz > 1MHz > 1MHz, Inverting > 1MHz, Non-Inverting Channel-to-channel 5MHz
Min
typ
210 180 160 15 3 18 40 1 350 -60 -51 50 0.01 0.04 26 58 4 15 15 56 0.5 6 2 40 0.4 10
Max
units
MHz MHz MHz MHz ns ns ns % V/s dBc dBc dB % dBm dBc nV/Hz pA/Hz pA/Hz dB mV V/C A nA/C A nA/C dB mA ns s V V mA M pF V dB
Frequency Domain Response
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Time Domain Response
Distortion/Noise Response
DC Performance
DC per channel
60 0.9 100 2.25
Disable Characteristics - CLC1603, CLC3603
DIS pin, disabled if pin is grounded or pulled below VOFF = +Vs - 3.5V DIS pin, enabled if pin is left open or pulled above VON = +Vs - 1.5V DIS pin is grounded Non-inverting Inverting
Disabled if < (+Vs - 3.5V) Enabled if > (+Vs - 1.5V) 0.15 4 350 1.0 1.5 to 3.5
Input Characteristics
RIN CIN CMIR CMRR Input Resistance Input Capacitance Common Mode Input Range Common Mode Rejection Ratio DC
Rev 1A
55
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5
Data Sheet
Electrical Characteristics at +5V continued
TA = 25C, +Vs = 5V, -VS = GND, Rf = Rg =1.2k, RL = 100 to +VS/2, G = 2; unless otherwise noted.
symbol
RO VOUT IOUT
parameter
Output Resistance Output Voltage Swing Output Current
conditions
Closed Loop, DC RL = 100
Min
typ
0.02 1.4 to 3.6 140
Max
units
V mA
Output Characteristics
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Rev 1A
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6
Data Sheet
Electrical Characteristics at 5V
TA = 25C, +Vs = 5V, -VS = -5V, Rf = Rg =1.2k, RL = 100 to GND, G = 2; unless otherwise noted.
symbol
UGBW BWSS BWLS BW0.1dBSS tR, tF tS OS SR HD2 HD3 THD DG DP IP3 SFDR en in XTALK VIO dVIO Ibn dIbn Ibi dIbi PSRR IS
parameter
Unity Gain Bandwidth -3dB Bandwidth Large Signal Bandwidth 0.1dB Gain Flatness Rise and Fall Time Settling Time to 0.1% Settling Time to 0.01% Overshoot Slew Rate 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Differential Gain Differential Phase Third Order Intercept Spurious Free Dynamic Range Input Voltage Noise Input Current Noise Crosstalk Input Offset Voltage (1) Average Drift Input Bias Current - Non-Inverting (1) Average Drift Input Bias Current - Inverting (1) Average Drift Power Supply Rejection Ratio (1) Supply Current (1)
conditions
G = +1, VOUT = 0.5Vpp, Rf = 2.5k G = +2, VOUT = 0.5Vpp G = +2, VOUT = 2Vpp G = +2, VOUT = 0.5Vpp VOUT = 2V step; (10% to 90%) VOUT = 2V step VOUT = 2V step VOUT = 0.2V step 2V step VOUT = 2Vpp, 5MHz VOUT = 2Vpp, 5MHz VOUT = 2Vpp, 5MHz, RL = 150 NTSC (3.58MHz), AC-coupled, RL = 150 NTSC (3.58MHz), AC-coupled, RL = 150 VOUT = 0.5Vpp, 10MHz VOUT = 1Vpp, 5MHz > 1MHz > 1MHz, Inverting > 1MHz, Non-Inverting Channel-to-channel 5MHz
Min
typ
240 200 120 30 4 18 35 1 450 -67 -57 55 0.01 0.03 35 58 4 15 15 56
Max
units
MHz MHz MHz MHz ns ns ns % V/s dBc dBc dB % dBm dBc nV/Hz pA/Hz pA/Hz dB
Frequency Domain Response
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Time Domain Response
Distortion/Noise Response
DC Performance
-4 -5 -5 DC CLC1603 CLC3603, CLC3613 50 0.7 6 2 40 2 10 75 1.1 3.3 250 2.25 DIS pin, disabled if pin is grounded or pulled below VOFF = +Vs - 3.5V DIS pin, enabled if pin is left open or pulled above VON = +Vs - 1.5V DIS pin is grounded, CLC1603 DIS pin is grounded, CLC3603 Non-inverting Inverting Disabled if < (+Vs - 3.5V) Enabled if > (+Vs - 1.5V) 0.11 0.3 4 350 1.0 4.0 0.5 0.5 2.5 6.5 5 5 4 mV V/C A nA/C A nA/C dB mA mA ns s V V mA mA M pF V
Disable Characteristics - CLC1603, CLC3603
TON TOFF VOFF VON ISD Turn On Time Turn Off Time Power Down Input Voltage Enable Input Voltage Disable Supply Current (1)
Input Characteristics
RIN CIN CMIR Input Resistance Input Capacitance Common Mode Input Range
Rev 1A
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7
Data Sheet
Electrical Characteristics at 5V continued
TA = 25C, +Vs = 5V, -VS = -5V, Rf = Rg =1.2k, RL = 100 to GND, G = 2; unless otherwise noted.
symbol
CMRR RO VOUT IOUT
notes: 1. 100% tested at 25C
parameter
Common Mode Rejection Ratio Output Resistance Output Voltage Swing Output Current
(1)
conditions
DC Closed Loop, DC RL = 100 (1)
Min
50
typ
60 0.1
Max
units
dB
Output Characteristics
+3.0 V mA -3.0 3.5 270
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Rev 1A
(c)2007-2008 CADEKA Microcircuits LLC
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8
Data Sheet
Typical Performance Characteristics
TA = 25C, +Vs = 5V, -VS = -5V, Rf = Rg =1.2k, RL = 100 to GND, G = 2; unless otherwise noted. Non-Inverting Frequency Response
1 0
Inverting Frequency Response
1 0 G = -1
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Normalized Gain (dB)
-1 -2 -3 -4 -5
Normalized Gain (dB)
G=1 Rf = 2.5k G=2
-1 G = -2 -2 G = -10 -3 -4 G = -5 -5 -6 -7 VOUT = 0.5Vpp 0.1 1 10 100 1000
G=5 G = 10
-6 -7 0.1
VOUT = 0.5Vpp 1 10 100 1000
Frequency (MHz)
Frequency (MHz)
Frequency Response vs. CL
1 0
Frequency Response vs. RL
2 RL = 5k 1
Normalized Gain (dB)
-2 -3 -4 -5 -6 -7 0.1 1 VOUT = 0.5Vpp
CL = 500pF Rs = 5 CL = 100pF Rs = 15 CL = 50pF Rs = 15 CL = 20pF Rs = 20 10 100 1000
Normalized Gain (dB)
-1
CL = 1000pF Rs = 5
RL = 1k
0 -1 -2 -3 -4 -5 -6 0.1 1 10 100 1000 VOUT = 0.5Vpp RL = 150 RL = 50
RL = 25
Frequency (MHz)
Frequency (MHz)
Frequency Response vs. VOUT
1 0
Frequency Response vs. Temperature
2 1 0
Normalized Gain (dB)
Normalized Gain (dB)
-1 VOUT = 4Vpp -2 -3 -4 -5 -6 -7 0.1 1 10 100 1000 VOUT = 1Vpp VOUT = 2Vpp
-1 -2 -3 -4 -5 -6 -7 0.1 1 VOUT = 0.2Vpp
+ 25degC - 40degC + 85degC
Rev 1A
10
100
1000
Frequency (MHz)
Frequency (MHz)
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9
Data Sheet
Typical Performance Characteristics
TA = 25C, +Vs = 5V, -VS = -5V, Rf = Rg =1.2k, RL = 100 to GND, G = 2; unless otherwise noted. Non-Inverting Frequency Response at +Vs = 5V, -VS=GND
1 0
Inverting Frequency Response at +Vs = 5V, -VS = GND
1 0 G = -1
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Normalized Gain (dB)
-1 -2 -3 -4 -5
Normalized Gain (dB)
G=1 Rf = 2.5k G=2
-1 G = -2 -2 G = -10 -3 -4 G = -5 -5 -6 -7 VOUT = 0.5Vpp 0.1 1 10 100 1000
G=5 G = 10
-6 -7 0.1
VOUT = 0.5Vpp 1 10 100 1000
Frequency (MHz)
Frequency (MHz)
Frequency Response vs. CL at +Vs = 5V, -VS = GND
1 0
Frequency Response vs. RL at +Vs = 5V, -VS = GND
2 RL = 5k 1
Normalized Gain (dB)
-2 -3 -4 -5 -6 -7 0.1 1 VOUT = 0.5Vpp
CL = 500pF Rs = 5 CL = 100pF Rs = 15 CL = 50pF Rs = 15 CL = 20pF Rs = 20 10 100 1000
Normalized Gain (dB)
-1
CL = 1000pF Rs = 5
RL = 1k
0 -1 -2 -3 -4 -5 -6 0.1 1 10 100 1000 VOUT = 0.5Vpp RL = 150 RL = 50
RL = 25
Frequency (MHz)
Frequency (MHz)
Frequency Response vs. VOUT at +Vs = 5V, -VS = GND
1 0
Frequency Response vs. Temp. at +Vs = 5V, -VS = GND
2 1 0
Normalized Gain (dB)
Normalized Gain (dB)
-1 VOUT = 3Vpp -2 -3 -4 -5 -6 -7 0.1 1 10 100 1000 VOUT = 1Vpp VOUT = 2Vpp
-1 -2 -3 -4 -5 -6 -7 0.1 1 VOUT = 0.2Vpp
+ 25degC - 40degC + 85degC
Rev 1A
10
100
1000
Frequency (MHz)
Frequency (MHz)
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10
Data Sheet
Typical Performance Characteristics - Continued
TA = 25C, +Vs = 5V, -VS = -5V, Rf = Rg =1.2k, RL = 100 to GND, G = 2; unless otherwise noted. Gain Flatness
0.1 0
Gain Flatness at +Vs = 5V, -VS = GND
0.1 0
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Normalized Gain (dB)
-0.1 -0.2 -0.3 -0.4 -0.5 0.1 1
Normalized Gain (dB)
Rf = 1.1k Rf = 1.2k
-0.1 -0.2 -0.3 -0.4 -0.5
Rf = 1.1k Rf = 1.2k
VOUT = 2Vpp RL = 150 10 100 1000
VOUT = 2Vpp RL = 150 0.1 1 10 100 1000
Frequency (MHz)
Frequency (MHz)
CMRR vs. Frequency
-20 -25 -30 -35 -40 -45 -50 -55 -60 -65 10k 100k 1M 10M 100M
VS = 5.0V
PSRR vs. Frequency
0 -10 -20
CMRR (dB)
PSRR (dB)
-30 -40 -50 -60 -70 0.01 0.1 1 10 100
Frequency (Hz)
Frequency (MHz)
Closed Loop Output Impedance vs Frequency
100
VS = 5.0V
Input Voltage Noise
7
Output Resistance ()
Input Voltage Noise (nV/Hz)
10
6
5
1
4
0.1
3
0.01 0.01
2
Rev 1A
0.1
1
10
100
0.0001
0.001
0.01
0.1
1001
Frequency (MHz)
Frequency (MHz)
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11
Data Sheet
Typical Performance Characteristics - Continued
TA = 25C, +Vs = 5V, -VS = -5V, Rf = Rg =1.2k, RL = 100 to GND, G = 2; unless otherwise noted. 2nd Harmonic Distortion vs. RL
-40 -45 -50 -55 RL = 100
3rd Harmonic Distortion vs. RL
-40 -45 -50 -55 RL = 100
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Distortion (dBc)
-60 -65 -70 -75 -80 -85 -90 -95 0 5 10 15 20 VOUT = 2Vpp RL = 1k
Distortion (dBc)
-60 -65 -70 -75 -80 -85 -90 -95 0 5 10 15 20 VOUT = 2Vpp RL = 1k
Frequency (MHz)
Frequency (MHz)
2nd Harmonic Distortion vs. VOUT
-45 -50 -55 10MHz
3rd Harmonic Distortion vs. VOUT
-45 -50 -55 10MHz
Distortion (dBc)
-65 -70 -75 -80 -85 -90 0.5 RL = 100 0.75 1 1.25 1.5 1.75 2 2.25 2.5 1MHz 5MHz
Distortion (dBc)
-60
-60 -65 -70 -75 -80 -85 -90 0.5
5MHz
1MHz
RL = 100 0.75 1 1.25 1.5 1.75 2 2.25 2.5
Output Amplitude (Vpp)
Output Amplitude (Vpp)
Crosstalk vs. Frequency
-30 -35 -40 -45 -50
Crosstalk (dB)
-55 -60 -65 -70 -75 -80 -85 -90 -95 0.1 1 10 100 VOUT = 2Vpp
Rev 1A
Frequency (MHz)
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Data Sheet
Typical Performance Characteristics - Continued
TA = 25C, +Vs = 5V, -VS = -5V, Rf = Rg =1.2k, RL = 100 to GND, G = 2; unless otherwise noted. Small Signal Pulse Response
0.125 0.1 0.075 0.05
Large Signal Pulse Response
2.5 2 1.5 1 VOUT = 4Vpp
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Voltage (V)
Voltage (V)
0.025 0 -0.025 -0.05 -0.075 -0.1 -0.125 0 10 20 30 40 50 60 70 80 90 100
0.5 0 -0.5 -1 -1.5 -2 -2.5 0 10 20 30 40
VOUT = 2Vpp
50
60
70
80
90
100
Time (ns)
Time (ns)
Small Signal Pulse Response at +Vs = 5V, -VS = GND
2.625 2.6 2.575 2.55
Large Signal Pulse Response at +Vs = 5V, -VS = GND
4 3.5 3
VOUT = 2Vpp VOUT = 1Vpp
Voltage (V)
2.5 2.475 2.45 2.425 2.4 2.375 0 10 20 30 40 50 60 70 80 90 100
Voltage (V)
2.525
2.5 2 1.5 1 0 10 20 30 40 50 60 70 80 90 100
Time (ns)
Time (ns)
Differential Gain & Phase AC Coupled Output
0.04 0.03
Differential Gain & Phase DC Coupled Output
0.3 0.25
Diff Gain (%) / Diff Phase ()
Diff Gain (%) / Diff Phase ()
0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 -0.7 -0.5 -0.3 -0.1 0.1 Input Voltage (V) 0.3 0.5 0.7 RL = 150 AC coupled into 220 F DP DG
0.2 0.15 0.1 0.05 0 -0.05 -0.1 -0.15 -0.7 -0.5 -0.3 -0.1 0.1 RL = 150 DC coupled DG
DP
Rev 1A
0.3
0.5
0.7
Input Voltage (V)
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Data Sheet
General Information - Current Feedback Technology
Advantages of CFB Technology The CLCx603 Family of amplifiers utilize current feedback (CFB) technology to achieve superior performance. The primary advantage of CFB technology is higher slew rate performance when compared to voltage feedback (VFB) architecture. High slew rate contributes directly to better large signal pulse response, full power bandwidth, and distortion. CFB also alleviates the traditional trade-off between closed loop gain and usable bandwidth that is seen with a VFB amplifier. With CFB, the bandwidth is primarily determined by the value of the feedback resistor, Rf. By using optimum feedback resistor values, the bandwidth of a CFB amplifier remains nearly constant with different gain configurations. When designing with CFB amplifiers always abide by these basic rules: * Use the recommended feedback resistor value * Do not use reactive (capacitors, diodes, inductors, etc.) elements in the direct feedback path * Avoid stray or parasitic capacitance across feedback resistors * Follow general high-speed amplifier layout guidelines * Ensure proper precautions have been made for driving capacitive loads
Ierr
x1
Zo*Ierr Rf
VOUT
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
VIN
Rg
RL
VOUT VIN
=-
Rf Rg
+ 1+
1 Rf Zo(j)
Eq. 2
Figure 2. Inverting Gain Configuration with First Order Transfer Function CFB Technology - Theory of Operation Figure 1 shows a simple representation of a current feedback amplifier that is configured in the traditional noninverting gain configuration. Instead of having two high-impedance inputs similar to a VFB amplifier, the inputs of a CFB amplifier are connected across a unity gain buffer. This buffer has a high impedance input and a low impedance output. It can source or sink current (Ierr) as needed to force the non-inverting input to track the value of Vin. The CFB architecture employs a high gain trans-impedance stage that senses Ierr and drives the output to a value of (Zo(j) * Ierr) volts. With the application of negative feedback, the amplifier will drive the output to a voltage in a manner which tries to drive Ierr to zero. In practice, primarily due to limitations on the value of Zo(j), Ierr remains a small but finite value. A closer look at the closed loop transfer function (Eq.1) shows the effect of the trans-impedance, Zo(j) on the gain of the circuit. At low frequencies where Zo(j) is very large with respect to Rf, the second term of the equation approaches unity, allowing Rf and Rg to set the gain. At higher frequencies, the value of Zo(j) will roll off, and the effect of the secondary term will begin to dominate. The -3dB small signal parameter specifies the frequency where the value Zo(j) equals the value of Rf causing the gain to drop by 0.707 of the value at DC. For more information regarding current feedback amplifiers, visit www.cadeka.com for detailed application notes, such as AN-3: The Ins and Outs of Current Feedback Amplifiers.
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VIN
Ierr
x1
Zo*Ierr Rf
VOUT
RL
Rg
VOUT VIN
= 1+
Rf Rg
+ 1+
1 Rf Zo(j)
Eq. 1
Rev 1A
Figure 1. Non-Inverting Gain Configuration with First Order Transfer Function
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14
Data Sheet
Application Information
Basic Operation Figures 3, 4, and 5 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations.
+Vs 6.8F
CFB amplifiers can be used in unity gain configurations. Do not use the traditional voltage follower circuit, where the output is tied directly to the inverting input. With a CFB amplifier, a feedback resistor of appropriate value must be used to prevent unstable behavior. Refer to figure 5 and Table 1. Although this seems cumbersome, it does allow a degree of freedom to adjust the passband characteristics. Feedback Resistor Selection One of the key design considerations when using a CFB amplifier is the selection of the feedback resistor, Rf. Rf is used in conjunction with Rg to set the gain in the traditional non-inverting and inverting circuit configurations. Refer to figures 3 and 4. As discussed in the Current Feedback Technology section, the value of the feedback resistor has a pronounced effect on the frequency response of the circuit. Table 1, provides recommended Rf and associated Rg values for various gain settings. These values produce the optimum frequency response, maximum bandwidth with minimum peaking. Adjust these values to optimize performance for a specific application. The typical performance characteristics section includes plots that illustrate how the bandwidth is directly affected by the value of Rf at various gain settings.
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Input
+ -
0.1F Output 0.1F RL Rf
G = 1 + (Rf/Rg)
Rg -Vs
6.8F
Figure 3. Typical Non-Inverting Gain Circuit
+Vs
6.8F
R1 Input Rg
+ -
0.1F Output 0.1F 6.8F -Vs RL Rf
G = - (Rf/Rg) For optimum input offset voltage set R1 = Rf || Rg
Gain (V/V 1 2 5
Rf () 2.5k 1.2k 1.2k
Rg () -1.2k 300
0.1dB BW (MHz) 42 30 8
-3dB BW (MHz) 240 200 70
Figure 4. Typical Inverting Gain Circuit
Table 1: Recommended Rf vs. Gain
+Vs
6.8F
Input
+ -
0.1F Output 0.1F 6.8F -Vs RL Rf
G=1 Rf is required for CFB amplifiers
In general, lowering the value of Rf from the recommended value will extend the bandwidth at the expense of additional high frequency gain peaking. This will cause increased overshoot and ringing in the pulse response characteristics. Reducing Rf too much will eventually cause oscillatory behavior. Increasing the value of Rf will lower the bandwidth. Lowering the bandwidth creates a flatter frequency response and improves 0.1dB bandwidth performance. This is important in applications such as video. Further increase in Rf will cause premature gain rolloff and adversely affect gain flatness.
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Rev 1A
Figure 5. Typical Unity Gain (G=1) Circuit
(c)2007-2008 CADEKA Microcircuits LLC
15
Data Sheet
Driving Capacitive Loads Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, and possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability and settling performance. Refer to Figure 6.
ringing. Refer to the layout considerations section for additional information regarding high speed layout techniques. Overdrive Recovery An overdrive condition is defined as the point when either one of the inputs or the output exceed their specified voltage range. Overdrive recovery is the time needed for the amplifier to return to its normal or linear operating point. The recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. The CLCx603 Family will typically recover in less than 30ns from an overdrive condition. Figure 7 shows the CLC1603 in an overdriven condition.
1.00 0.75 0.50 Input Output 0.00 -0.25 -0.50 -0.75 -1.00 0 20 40 60 80 100 120 140 160 180 200 5 4 3 2 1 0 -1 -2 -3 -4 -5
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Input
+ Rf Rg
Rs CL RL
Output
Figure 6. Addition of RS for Driving Capacitive Loads Table 2 provides the recommended RS for various capacitive loads. The recommended RS values result in <=0.5dB peaking in the frequency response. The Frequency Response vs. CL plot, on pages 9 and 10, illustrate the response of the CLCx603 Family.
CL (pF) 10 50 100 RS () 40 20 15 -3dB BW (MHz) 350 200 140
VIN = 1.5Vpp G=5
Output Voltage (V)
Input Voltage (V)
0.25
Time (ns)
Figure 7. Overdrive Recovery Table 1: Recommended RS vs. CL For a given load capacitance, adjust RS to optimize the tradeoff between settling time and bandwidth. In general, reducing RS will increase bandwidth at the expense of additional overshoot and ringing. Parasitic Capacitance on the Inverting Input Physical connections between components create unintentional or parasitic resistive, capacitive, and inductive elements. Parasitic capacitance at the inverting input can be especially troublesome with high frequency amplifiers. A parasitic capacitance on this node will be in parallel with the gain setting resistor Rg. At high frequencies, its impedance can begin to raise the system gain by making Rg appear smaller. In general, avoid adding any additional parasitic capacitance at this node. In addition, stray capacitance across the Rf resistor can induce peaking and high frequency
(c)2007-2008 CADEKA Microcircuits LLC
Power Dissipation Power dissipation should not be a factor when operating under the stated 100 ohm load condition. However, applications with low impedance, DC coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond it's intended operating range. Maximum power levels are set by the absolute maximum junction rating of 150C. To calculate the junction temperature, the package thermal resistance value ThetaJA (JA) is used along with the total die power dissipation.
Rev 1A
TJunction = TAmbient + (JA x PD)
Where TAmbient is the temperature of the working environment.
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16
Data Sheet
Maximum Power Dissipation (W)
In order to determine PD, the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. PD = Psupply - Pload Supply power is calculated by the standard power equation. Psupply = Vsupply x IRMS supply Vsupply = VS+ - VSPower delivered to a purely resistive load is: Pload = ((VLOAD)RMS2)/Rloadeff The effective load resistor (Rloadeff) will need to include the effect of the feedback network. For instance, Rloadeff in figure 3 would be calculated as: RL || (Rf + Rg) These measurements are basic and are relatively easy to perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. Here, PD can be found from PD = PQuiescent + PDynamic - PLoad Quiescent power can be derived from the specified IS values along with known supply voltage, VSupply. Load power can be calculated as above with the desired signal amplitudes using: (VLOAD)RMS = VPEAK / 2 ( ILOAD)RMS = ( VLOAD)RMS / Rloadeff The dynamic power is focused primarily within the output stage driving the load. This value can be calculated as: PDYNAMIC = (VS+ - VLOAD)RMS x ( ILOAD)RMS Assuming the load is referenced in the middle of the power rails or Vsupply/2. Figure 8 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 8 and 14 lead SOIC packages.
2.5 SOIC-16 2
1.5
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
SOIC-14
1
0.5
SOT23-6
0 -40 -20 0 20 40 60 80
Ambient Temperature (C)
Figure 8. Maximum Power Derating
Better thermal ratings can be achieved by maximizing PC board metallization at the package pins. However, be careful of stray capacitance on the input pins. In addition, increased airflow across the package can also help to reduce the effective JA of the package. In the event the outputs are momentarily shorted to a low impedance path, internal circuitry and output metallization are set to limit and handle up to 65mA of output current. However, extended duration under these conditions may not guarantee that the maximum junction temperature (+150C) is not exceeded. Layout Considerations General layout and supply bypassing play major roles in high frequency performance. CaDeKa has evaluation boards to use as a guide for high frequency layout and as aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: * Include 6.8F and 0.1F ceramic capacitors for power supply decoupling * Place the 6.8F capacitor within 0.75 inches of the power pin * Place the 0.1F capacitor within 0.1 inches of the power pin * Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance * Minimize all trace lengths to reduce series inductances Refer to the evaluation board layouts below for more information.
Rev 1A
(c)2007-2008 CADEKA Microcircuits LLC
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17
Data Sheet
Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of these devices: Evaluation Board # CEB002 CEB018 CEB013 CLC1603 CLC3613 CLC3603 Products
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Evaluation Board Schematics Evaluation board schematics and layouts are shown in Figures 9-14. These evaluation boards are built for dual- supply operation. Follow these steps to use the board in a single-supply application: 1. Short -Vs to ground. 2. Use C3 and C4, if the -VS pin of the amplifier is not directly connected to the ground plane.
Figure 10. CEB002 Top View
Figure 11. CEB002 Bottom View
Figure 9. CEB002 Schematic
Rev 1A
(c)2007-2008 CADEKA Microcircuits LLC
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18
Data Sheet
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Figure 14. CEB018 Bottom View
Figure 12. CEB018 Schematic
Figure 16. CEB013 Schematic
Figure 13. CEB018 Top View
Rev 1A
(c)2007-2008 CADEKA Microcircuits LLC
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19
Data Sheet
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
Figure 17. CEB013 Top View
Figure 18. CEB013 Bottom View
Rev 1A
(c)2007-2008 CADEKA Microcircuits LLC
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20
Data Sheet
Mechanical Dimensions
SOT23-6 Package
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
SOIC-14
Rev 1A
(c)2007-2008 CADEKA Microcircuits LLC
www.cadeka.com
21
Data Sheet
Mechanical Dimensions
SOIC-16 Package
Comlinear CLC1603, CLC3603, CLC3613 Single and Triple, 1.1mA, 200MHz Amplifiers
For additional information regarding our products, please visit CADEKA at: cadeka.com
caDeKa Headquarters Loveland, Colorado T: 970.663.5452 T: 877.663.5452 (toll free)
CADEKA, the CADEKA logo design, COMLINEAR, the COMLINEAR logo design, and ARCTIC are trademarks or registered trademarks of CADEKA Microcircuits LLC. All other brand and product names may be trademarks of their respective companies. CADEKA reserves the right to make changes to any products and services herein at any time without notice. CADEKA does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties. Copyright (c)2007-2008 by CADEKA Microcircuits LLC. All rights reserved.
Rev 1A
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